Enhanced performance in 50 nm N-MOSFETs with silicon-carbon source/drain regions (2004 IEDM, K.W.Ang, V.C.Yeo, NUS)

Kah Wee Ang; King Jien Chui; Bliznetsov, V.; Anyan Du; Balasubramanian, N.; Ming Fu Li; Ganesh Samudra; Yee-Chia Yeo, "Enhanced performance in 50 nm N-MOSFETs with silicon-carbon source/drain regions," Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International , vol., no., pp. 1069-1071, 13-15 Dec. 2004

Abstract: This paper reports a novel strained N-channel transistor structure with sub-100 nm gate lengths. The strained N-MOSFET features silicon-carbon (SiC) source and drain (S/D) regions formed by a Si recess etch and a selective epitaxy of SiC in the S/D regions. The carbon mole fraction incorporated is 1.3%. Lattice mismatch of 0.65% between SiC and Si results in horizontal tensile strain and vertical compressive strain in the Si channel region, both contributing to substantial electron mobility enhancement. The conduction band offset Ec between the SiC source and the strained-Si channel also contributes to increased electron injection velocity from the source. Implementation of the SiC stressors provides significant drive current IDS enhancement in the N-MOSFETs. IDS enhancement of 50% was observed for a gate length of 50 nm.

URL: http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1419383&isnumber=30682&punumber=9719&k2dockey=1419383@ieeecnfs&query=(+((sic)%3Cin%3Emetadata+)+%3Cand%3E+((strain)%3Cin%3Emetadata+)+)&pos=0&access=no

picture device independent bitmap 115

The Sic SID
regions act as stressors to induce lateral tension and vertical
compression in the Si channel, therefore enhancing electron mobility.
In addition, the Sic-Strained-Si heterojunction at the source end of
the transistor provides for enhanced electron injection velocity from
the source (Fig. 1).

picture device independent bitmap 29

Si recess etch of -40 nm and a selective
epitaxial growth of Si0.987C0.013the S/D regions. The SIC S/D
regions are slightly raised. Sourceldrain implantation and dopant
activation (3 min. RTA at 95OOC) were then performed.
The ID-VD characteristics of a 50 nm gate length LG transistor
with SIC SID regions shows 50% enhancement in drive current over
a control transistor at a gate over-drive (Vc Vt) of 1.0V, as shown in
Fig. 4. The Ids enhancement could be attributed to the following
reasons. First, uniaxial tensile strain is induced in the channel region,
leading to enhanced electron mobility. Second, the conduction band
offset delta Ec at the heterojunction between thc SIC sourse and the
strained-Si chamel enables injection of electrons with additional
energy deltaEc, or at a higher velocity, leading to higher Ids
picture device independent bitmap 36

This suggests that the strain
effect due to the Sic SID stressors as well as the increased electron
injection velocity begin to play an increasingly important role at sub-
100 nm gate lengths.

The magnitude of&= is the largest
in the vicinity of the stressor, and decreases with increasing depth and
towards the middle of the Si channel. The smaller lattice constant of
Sic compared to Si also leads to a vertical compressive strain the Si

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