EETimes.com – Source: Samsung explores gate-last high-k

EETimes.com – Source: Samsung explores gate-last high-k.

SAN JOSE, Calif. — In a major departure, South Korea’s Samsung Electronics Co. Ltd. is reportedly exploring an alternative in high-k dielectrics: It is looking at gate-last technology, according to sources.Initially, Samsung plans to roll out a rival gate-first, high-k technology. As previously reported, the technology will be offered at the 32- and 28-nm nodes for foundry customers, which will be rolled out this year.

Some believe that gate-first is only a one-node solution. As a result, sources believe Samsung’s foundry unit is working on a gate-last technology for 22-nm. Ana Hunter, vice president of foundry services for Samsung Semiconductor Inc., declined to comment on reports that Samsung is looking at a gate-last technology.

If the reports are true, this would be a major departure from Samsung’s original position. The gate-first technology was developed and is now being touted by IBM Corp.’s ”fab club.” IBM, Infineon, GlobalFoundries, NEC, Samsung, ST, Toshiba and others are part of IBM’s technology alliance.

IBM, GlobalFoundries and Samsung are co-developing foundry processes and will roll out a gate-first, high-k offering this year. So far, though, IBM’s camp, which includes Advanced Micro Devices Inc. (AMD), has not rolled out a high-k/metal-gate offering.

The camp is far behind Intel Corp., which has shipped 45- and 32-nm processors based on its gate-last, high-k technology.

Except for Intel, leading-edge chip makers are struggling to switch from today’s silicon dioxide to a high-k gate insulator. Silicon dioxide as a gate dielectric is running out of gas at 45-nm, but some are pushing it to 28-nm.

But high-k has been delayed because of difficulties in developing the technology. In addition to high-k, chip makers must also move to metal gates, replacing the N and P doped polysilicon gate electrodes with metallic alloys to eliminate polysilicon depletion at the gate.

There are two basic approaches to the next-generation gate stack in logic designs. IBM’s ”fab club” is using a gate-first approach, while Intel is deploying a rival replacement-gate or gate-last technology. In a gate-first approach, the gate stack is formed before the source and drain, as in a conventional CMOS process. Replacement-gate technologies are a gate-last approach, where the gate stack is formed after source and drain.

In any case, Samsung will likely become one of the first foundries to roll out a high-k/metal-gate solution for customers. ”We think that gate-first is best suited for today’s needs,” Samsung’s Hunter said.

At the recent Semico Outlook conference, Hunter also provided six basic reasons why Samsung believes it will succeed in the foundry business.

It’s unclear if Samsung will implement gate-last at 22-nm. It has quietly assembled an R&D group that is exploring the technology. It’s also unclear if IBM’s fab club will make the switch or not.

Rival Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) has already switched camps. Originally, TSMC was planning to go with a gate-first technology. Now, it will go with gate-last.

”The first high-k metal gate we call 28 HP for the high performance application will be introduce the end of September this year. This is the first high-k metal gate introduction for low power applications,” said Shang-Yi Chiang, senior vice president of R&D at TSMC, in a recent presentation.

”At this moment the only way we know how to do that is the gate last approach,” he said. ”This is a controversial issue in the industry. The industry (has) diverged to two approaches. One is what we call gate-first. Another is gate-last.”

Gate-last, according to TSMC, has some advantages. ”The gate-last process is a little more complicated and a lot more difficult to do. But after you learn that (process), the challenge is very much the same, and the cost is pretty much the same,” he said.

”The real key difference in the gate-last approach (is that) we use two different gate metals, one metal for the P channel and one metal for N channel. For the gate-first approach, we use the same metal for N and P channel. In gate-last, we can freely adjust voltage for both N channel and P channel. Gate-first has difficulty doing that. So that’s a major difference,” he added.

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