EETimes.com – Innovative Silicon moves floating-body RAM off SOI

EETimes.com – Innovative Silicon moves floating-body RAM off SOI.


EE Times

LONDON — Innovative Silicon Inc. (Santa Clara, Calif.), a pioneer of floating-body memory, has said it has adapted its technology for operation at less than one volt and so that it does not require a silicon-on-insulator substrate.A test chip generated at Hynix Semiconductor Inc. using 54-nm design rules has demonstrates Z-RAM technology is a contender as the lowest cost and lowest power DRAM replacement technology, the company said.

Innovative Silicon, founded in 2002 and still privately held, said it is not providing engineering detail of its achievement at this time. A paper jointly authored by Hynix and Innovative Silicon, has been submitted for presentation at the 2010 VLSI Technology Symposium. The paper will reveal more details of the cell operating voltages, the company said.

Implementing floating-body RAM on bulk silicon avoids the need for expensive silicon on insulator (SOI) substrates. Innovative Silicon said that Z-RAM was set to be lower-cost than traditional DRAM at sub-40-nm production nodes as well as meeting the double data rate performance requirements.

“We are very excited about the upgrades to our Z-RAM technology, as they tackle, head-on, the requirements of the large memory manufacturers to have the technology available on bulk silicon and with lower costs than any other DRAM technology — including conventional DRAM,” said Mark-Eric Jones, president and CEO of Innovative Silicon, in a statement. “Conventional DRAM has been the low cost, random-access memory technology for 40 years, but the memory industry is on the verge of transitioning to the capacitor-free Z-RAM technology.”

Pierre Fazan, chairman and chief technology officer, said: “The Z-RAM technology now has all of the key ingredients to fully replace stand-alone DRAM. It is implemented on bulk silicon and has demonstrated cell operating voltages below one-volt with no degradation to its multi-second static retention time, and delivers greater than a 1000 times improvement in dynamic or ‘disturb’ retention time. The Z-RAM technology’s operating voltage is now 50 to 75 percent lower than any other floating body or thyristor memory announced to date, and it is the only FB memory technology to cover the entire ITRS memory roadmap.”

“The advances in power and voltage demonstrated in our 54-nm test chips show that the Z-RAM technology has solved the most challenging issues we have seen with floating-body memories. These results validate that the Z-RAM technology has great potential to replace conventional DRAM over the next few memory generations,” said Sungjoo Hong, vice president of DRAM R&D at Hynix Semiconductor, in the same statement.

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