Posts Tagged ‘ 22nm ’

Achronix to Deploy Intel 22nm Process Technology

Achronix to Deploy Intel 22nm Process Technology.

 

Achronix Semiconductor Corp., a fabless provider of field programmable gate arrays (FPGA)announced that it has acquired strategic access to Intel (News – Alert) Corporation’s 22 nanometer process technology, on the basis of which it will be able to develop advanced FPGAs.

The San Jose, Calif.-based company builds fast FPGAs that are capable of up to 1.5 GHz peak performance, and has its sales offices and representatives in the United States, Europe, China, Japan, and Korea.

The new Achronix Speedster22i FPGA family will be much ahead of the currently available FPGAs, and will enable the enterprises to achieve cost effective production of high performance devices over 2.5M LUTs in size, equivalent to an ASIC of over 20 million gates.

Intel’s 22nm process technology will offer enhanced performance and power savings to enable the Speedster22i in achieving enhanced FPGA speed and power efficiency, providing a maximum of 300 percent higher performance, 50 percent lower power, and 40 percent lower cost than other FPGA deployed in different process technologies.

Helpful in a number of applications in the telecommunication, networking, industrial and consumer markets, Achronix Speedster22i will allow enterprises to deploy advanced applications such as 100G, 400G Ethernet networking and LTE (News – Alert) mobile communications. It will be the first commercial FPGA family that can be manufactured in the United States of America, so that the military and aerospace applications requiring ‘on shore’ silicon will also be able to benefit from the platform.

In the words of Sunit Rikhi, vice president, Technology and Manufacturing Group, Intel, company’s manufacturing strengths and lead in process technology offers leadership cost, performance and power efficiency benefits, giving its manufacturing customers such as Achronix an opportunity to design products with superior capabilities.

According to John Lofton Holt, chief executive officer at Achronix, Intel has the best process technology in the world and Achronix is privileged to have formed this strategic relationship, which enables simultaneous improvements in speed, power, density and cost. Holt noted that the combination of the advanced 22nm process from Intel and the advanced FPGA technology from Achronix enables Speedster22i to eclipse other FPGA solutions expected to hit the market in the next few years.

In August 2010, Achronix Semiconductor and Opticomp, a high throughput optical module provider jointly readied a reprogrammable development platform for developing, characterizing and demonstrating state-of-the-art optical data communications. The new development system leveraged Achronix’s Bridge100 FPGA board and Opticomp’s 120-Gbps multi-port system that is expandable to 160-Gbps and can be used with individual optical modules.

Design Challenges for 22nm CMOS and Beyond (S.Barkar, Intel 2009 IEDM)

paper

Past : segmented hardmacro functional block –> system is built using combination of those hardmacro with a bit of softmacro.

    • relied upon custom design methodology for higher performance and smaller area.
    • –> due to increasing design rule complexity, restrictions, and regularity –> little room to improve custom design
    • custom design more focus on local design rather than global design –> sub optimal in overall sense.
  • Future : System with soft macro only.
    • in 22nm and beyond is System Design with design automation at all levels.
    • Softmacro rather than hardmacro
      • described at a higher level of abstraction, such as an RTL description.
    • system can be built at a higher level of abstraction using these softcore functional blocks
      • processors, bus, other functional blocks
      • system is optimized using system level optimizer
    • physical design is optimized as well.
    • Custom design is limited to memory array, register files

EETimes.com – Top 15 technology challenges for 22-nm node

EETimes.com – Top 15 technology challenges for 22-nm node.

2_R.Harris_SEMATECH.pdf (application/pdf 객체)

2_R.Harris_SEMATECH.pdf (application/pdf 객체).

2007 Stanford 3D workshop_1_Nishi_Stanford.pdf

WebCite query result.

5_M_GuillomIBM FinFETs for the 22 nm technology.pdf (application/pdf 객체)

5_M_GuillomIBM FinFETs for the 22 nm technology.pdf (application/pdf 객체).

CMOS Transitions to 22 and 15 nm – 2010-01-01 07:00:00 | Semiconductor International

CMOS Transitions to 22 and 15 nm – 2010-01-01 07:00:00 | Semiconductor International. Continue reading