Posts Tagged ‘ 32nm ’

Technology@Intel · IEDM, 32nm, and the all new 2010 Intel® Core Processor Family

Technology@Intel · IEDM, 32nm, and the all new 2010 Intel® Core Processor Family.

posted by Kelin Kuhn on January 07, 2010

With today’s launch of the all new 2010 Intel® Core Processor Family (based on Westmere, code name for our 32nm project), this is a great time to discuss the the 32nm process technology (and the semiconductor communities response to this technology!)

Traditionally, Intel presents the details of its process technologies at the International Electron Devices meeting (IEDM) and 32nm is no exception.   Although I was unable to attend the conference this year, my colleagues (and the faithful blogosphere) have provided me with an opportunity to tell the real story.

The 32nm process technology is based on high-k metal gate. Intel was the first manufacturer to introduce the high-k metal gate technology into manufacturing in 45nm (see IEDM 2007) and (as Carl Wintgens from EE times points out) “Semiconductor Insights has yet to observe a metal gate technology in a commercial device from any other semiconductor manufacturer.”

Like Intel’s 45nm technology, Intel’s 32nm high-k metal gate process is a gate-last (or replacement gate process). The gate-last (or replacement gate) architecture provides a higher thermal budget for the midsection (better activation of S/D anneals), lower thermal budget for the metals (improved range of metal choices) AND delivers significant improvement of strain for both NMOS and PMOS.   The metal gate (and associated strain) gives these transistors more performance at the same power, to enable your favorite performance-hungry applications (things like games, video editing and so on).

The high-k metal gate process in 32nm generated some big headlines in the blogsphere. David Lammers of Semiconductor International reported the big news, as “Intel’s flagship 32 nm technology achieved record drive current levels, with the PMOS transistor showing a 35% drive current improvement over the 45 nm PMOS device.” Lammers also picked up a subtle but key aspect of 32nm as he pointed out “For the first time, linear drive currents on the PMOS have overtaken NMOS.” It will only be a short time before saturated drive currents on PMOS overtake NMOS (perhaps at 22nm?).   Matched drive currents on NMOS and PMOS permit the best possible layout density (thus lower cost!) and have been a “wish-list” item from designers for decades.

There has been much discussion on gate first vs gate last (or replacement gate) since Intel’s initial introduction of replacement gate in 45nm. However, as David Lammers from Semiconductor International reports, Intel’s vision on gate last is finally being appreciated. Lammers headline says a great deal with, Problems with the gate-first approach to high-k/metal gate deposition may force IBM to switch to the gate-last approach pioneered by Intel.” Lammers adds, “Concerns about threshold voltage shifts and other performance problems with the gate-first approach to high-k/metal gate creation may cause GlobalFoundries (Sunnyvale, Calif.) and other members of the IBM-led Fishkill Alliance to shift to a gate-last technique, sources said at the International Electron Devices Meeting (IEDM), going on this week in Baltimore [IEDM 2009].” In addition, Lammers reports, “”The baseline roadmap at TSMC is gate last,” said Jack Sun, in charge of technology strategy at TSMC.”

Of course, the most important point illustrated by 32nm is that it continues to maintain Moore’s law scaling! Carl Wintgens from EE times takes the stance that Moore’s Law is alive an well, with “All three players [i.e. Intel, AMD, TSMC] had comparable critical dimensions, illustrating that Moore’s law is alive and well with no sign of slowing.” Lammers from Semiconductor International was slightly more pessimistic with, “Though several participants at IEDM said CMOS scaling is likely to slow to a three-year pace, Bohr said Intel plans to stay on a two-year cadence.”

As a closing thought, Carl Wintgens from EE times highlights Intel’s continued commitment to driving innovation with “Intel clearly shows leadership in implementing process innovations”

For a look at the detailed IEDM technical papers showcasing these neat features, check out the links below!

32nm at IEDM 2009:  Paper

32nm at IEDM 2008:  Foils and Paper and David Kantor at Real World Technologies 2008 article

Advertisements – How much of a lead does Intel have at 32nm? (Dec/09) – How much of a lead does Intel have at 32nm?.

How much of a lead does Intel have at 32nm?
Intel will soon be releasing their latest processor, code named Westmere, built on 32nm technology. Architecturally, the processor will be similar to the Nehalem design introduced last year and marketed as Core i7. The big change, however, will be Intel’s new 32nm fabrication technology. Semiconductor Insights was fortunate to obtain the desktop version of the processor early and perform an independent detailed analysis of the Westmere/Clarksdale’s process technology. At 32nm, Intel is introducing their second generation of high-k metal gate technology as well as other interesting process innovations. That being said, Semiconductor Insights has yet to observe a metal gate technology in a commercial device from any other semiconductor manufacturer. So, where exactly are Intel’s competitors in the 32nm race?

To this end, let’s compare the two main processor companies, Intel and AMD, and the leading pure-play semiconductor foundry, TSMC. All data presented here was independently gathered by Semiconductor Insights. Since TSMC does not have a product per se, we analyzed devices from a fabless FPGA manufacturer using TSMC technology. FPGA makers are usually among the first adopters of new technology from foundries like TSMC, since smaller geometries allow them to include more logic elements in their product and increase the overall performance and flexibility of their design. Also, note that we did not include the IBM/Common Platform technology due to the limited amount of independent data at this time. However, it will be interesting to see how the relatively new technology alliance will fare in the future against the reigning champion of foundries, TSMC.

To better understand that future, it’s sometimes helpful to look at the past. Table 1 shows the dates of introduction for the 90nm, 65nm, 45nm technology nodes as well as the upcoming 32nm node from our three manufacturers. We can see that Intel has consistently introduced a new process technology at the beginning of the year, every two years. This pace is dictated by Moore’s law, a trend Intel has diligently followed since first observed by Intel’s co-founder, Gordon E. Moore. Intel has been so regular in the launch of new technologies, we can almost safely predict that the next 22nm process from Intel will be ready around the beginning of 2012.

AMD has also stayed on track with Moore’s law for the past tech nodes, introducing new processes during the same year but usually later than Intel. However, a period of more than two years is now expected between the introduction of AMD’s 32nm technology and the previous 45nm node first seen in late 2008. This slowdown may be partly explained by the transfer of AMD’s manufacturing operations to GlobalFoundries but is most likely a sign of how difficult it will be to keep up with Moore’s law beyond the 32nm node.

TSMC’s track record, while not as regular as the two processor companies, depended on the fabless manufacturer’s product roadmap. A three-year gap was observed between the availability of 90nm and 65nm products, followed by an impressive 15-month cycle between 65nm and 45/40nm. With the help of intermediary process nodes slotted in between the major technology nodes, TSMC has been able to launch a new technology approximately every year, setting a rapid pace for the rest of the pure-play foundry industry to follow.

Click on image to enlarge.

Moore’s law predicts a 70 percent reduction in the size of the integrated circuit’s features at every technology node. One dimension of interest (besides the gate length of the transistor) is the minimum spacing between interconnect lines. This dimension determines how densely packed the logic gates will be and ultimately how many transistors can fit on a single chip. We plotted (Figure 1 online) the minimum interconnect line pitch for all three manufacturers as a function of the technology node. All three players had comparable critical dimensions, illustrating that Moore’s law is alive and well with no sign of slowing.

Interestingly, TSMC has slightly smaller dimensions than the two other manufacturers, probably because TSMC’s customers are mainly SoC manufacturers, such as graphics processor and FPGA makers. With the latest graphics processors having more than a billion transistors, any reduction in chip size is highly beneficial to foundry clients, even though the individual transistors may not be as fast as Intel’s or AMD’s.

Every new technology node both reduces critical dimensions and improves process. Two fundamental process innovations being adopted by the main semiconductor companies are embedded silicon-germanium source/drain regions (eSiGe) and high-k metal gate technology (HKMG). eSiGe increases the performance of the slower type of transistors (PMOS), while HKMG helps the transistors switch faster and reduces the gate leakage.

Table 2 illustrates when these features were adopted by the three manufacturers. Here, Intel clearly shows leadership in implementing process innovations, having introduced eSiGe first at the 90nm node in 2004. AMD closely follows by one technology node, while TSMC is approximately two generations behind Intel (technically one and a half nodes behind in the case of HKMG since the 28nm node will represent a half-node). Advanced process features, such as silicon-on-insulator (SOI) used by AMD, were not compared if not widely adopted.

In the end, a better process technology does not guarantee a better semiconductor. In the past, AMD mitigated the lag in process and gained market share from Intel by making sound circuit design decisions such as having an efficient, short pipeline architecture and the first integrated memory controller on-die (later implemented by Intel). Intel is also facing tough competition in other market segments such as graphics processing and in the fast-growing ultra-low-power device market. However, assuming comparable designs, Intel’s technology lead will likely allow it to have an edge over the competition, at least until the introduction of the 32nm technology from AMD/GlobalFoundries in late 2010 or early 2011.

Click on image to enlarge.