Archive for the ‘ Consortium ’ Category

The challenge facing the front-end semiconductor equipment industry

The challenge facing the front-end semiconductor equipment industry.

The semiconductor equipment industry, which has been experiencing tough sledding since 2007, failed to cope with the last two cyclical downturns and is not well positioned to face uncertain economic conditions. Editor’s note: This article is part one of a two-part analysis on the state of the front-end capital equipment industry and its future prospects.

The semiconductor equipment industry has been battling a significant industry cyclical downturn since the end of 2007. Vapital spending by customers in the industry has declined significantly from the boom times in the 2000 period. In 2010, the industry is seeing signs of a cyclical rebound—albeit perhaps short-lived as the world copes with a sluggish recovery from the deep recession. I believe the industry has failed to cope with the last two cyclical downturns and is not well positioned to face uncertain economic conditions.

Lack of product innovation

Insignificant product innovation from all of the major equipment companies has led customers to restrain investment in R&D type of equipment and capital. Product development by the equipment companies in the past three to five years has only offered incremental improvement, which the customers refuse to pay premiums for, thereby reducing the profitability of the equipment companies. Unit volumes for new products have not grown due to the lack of innovation, demand interruption caused by the cyclical downturn and the customers’ ability to reuse equipment.

Fundamental business model change

There has been a fundamental change in the business model of the semiconductor capital equipment company caused by the lack of product innovation. Product innovation is defined as products that are disruptive to the current installed product set that demonstrates a significant value through productivity improvement and process capability that enables customers to shorten their product development cycles.

In the 1990s, Applied Materials developed the physical vapor deposition system (Endura) which dramatically improved the capability of the customer and had an average selling price that was nearly 3X the price of its nearest competitor. The value proposition was so compelling that the customers willingly paid the prices since the tool improved the customers’ capability significantly.

The current lack of innovation has the impact of commoditizing the tool set, which results in price erosion, consequently lower gross margins and therefore pressure on operating expenses which starts the cycle all over again. The equipment companies have had to reduce capacity and cost and spend less money on R&D and process development. Applied Materials’ workforce is actually fewer  today than it was in 2003. They have also shed employees and other valuable employees have left the industry completely moving to alternative energy or the biotech industries.

The major factors for this value migration is the impact of the lack of product innovation AND the impact of the 300-mm production implementation by the customers. There has been a resultant “brain drain” from the semiconductor equipment industry to other industries where process engineering skills are critical to growth. Venture-backed investment in equipment company startups has been virtually non-existent, with no single new company emerging as a major player in the industry.

300-mm production generation
The 300-mm product life cycle has been devastating to the equipment industry. The fundamental business model was changed as pricing of 300-mm equipment was significantly less than 200-mm without the attendant cost reductions, thereby compressing margins of the semiconductor equipment company.

The equipment industry believed that unit volume would stay flat or grow a bit due to increasing product complexity evidenced by the number of process steps in future product generations. The customers slowed their migration to increasing complexity and the impact on the equipment industry was reduced unit volume.

The customers achieved significant cost benefits through the significant increase in die per wafer (more than 225 percent over 200-mm equivalents) without having to pay enough for those cost benefits.

Gross margins for the equipment industry of more than 50 percent have been reduced by as much as 10-15 points, making it difficult if not impossible to invest in R&D at traditional model levels of 15-20 percent of sales. Operating margins are contracted, forcing the value migration to the semiconductor manufacturer.

The major companies in the pursuit of Moore’s Law—Intel, Samsung and TSMC—have been successful in their supply chain practices reducing equipment company margins. Equipment companies tried in turn to leverage their supply chain without much success, as their leverage over their supply chain is minimal.

Many suppliers to the semiconductor equipment industry abandoned the business entirely rather than succumb to continued pricing pressure. This business phenomenon forced equipment companies to reduce their research and development spending and, while the chip companies reap the benefit of enhanced production of 300-mm tools, the lack of profitability and returns for the equipment industry actually constrains the growth of the entire industry since innovation and new applications cannot be pursued economically.

In addition, venture capital for the entire industry has been impacted by this situation. As growth rates and applications decline there is no reason for entrepreneurs to develop new ideas for the space. The equipment companies did little strategically to combat the behavior of their customers such as:

Used equipment— the equipment industry did not develop an adequate used tool strategy to maximize revenue, instead the customers learning the techniques of “equipment reuse” which should have been the bastion of the equipment company’s expertise.

Services—the equipment company’s failed to add value added service offerings such as process development, equipment maintenance cost savings, parts offerings etc. to buttress the loss of capital equipment spending.  Other companies filled this vacuum.

Sematech-the consortia abandoned their approach to improved productivity as focus by member companies turned to photolithography requirements for advanced technology nodes and significantly reduced the size of Sematech’s budget.  The State of New York lured Sematech and its member companies through strong subsidies abandoning manufacturing capability initiatives based in Austin, Texas.

The upshot is that the supply chain to the semiconductor equipment industry has become disheveled and weak and not capable of response. Many companies went bankrupt during the downturn and other stronger entities moved on to other industries and refused to grant the cost reduction demands of the equipment industry executives.

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IMEC prepares industry for introduction of vertical transistors

IMEC prepares industry for introduction of vertical transistors.

According to industry sources attending the IMEC Technology Forum in Leuven, Belgium, the chip industry is currently preparing for the introduction of vertical transistors. Shang-yi Chiang, senior vice president of research and development at TSMC said that the company has already decided to use a vertical transistor structure at the 14nm node.

“We looked at the basic device physics, and came to a decision that we cannot use a planar structure at the 14nm node. With a vertical transistor we have better control of the channel,” said Chiang. TSMC will move from 28nm to 20nm, and then to the 14nm generation by the middle of this decade.

IMEC has also now opened the additional 1,200m2 of its cleanroom, which adds 50% to the facility that was opened five years ago. The added space was included to accommodate the NXT: 3100 EUV tool expected to be installed at IMEC by the end of 2010.

IMEC’s Thomas Hoffmann, director of the Front End of the Line (FEOL) program, said, “Today we are getting a lot of questions about FinFETs from the fabless companies that participate in our Insite program.” TSMC’s plans, as well as persistent rumors that Intel may adopt vertical transistors at the 22nm node, are driving the preparation efforts, he added.

“One challenge we and our partners have is unraveling how a gate-last technology on FinFETs will work. For companies moving to FinFETs at either the 22 or 16nm nodes, they want to know what the implications for high-k/metal gate if they go to a non-planar structure,” Hoffmann said in an interview at the IMEC facilities in Leuven.

The gate-last approach, first adopted by Intel at the 45nm node and also selected by foundry TSMC for its 28nm high-k process, has several advantages, Hoffmann said. The PMOS threshold voltage appears to be more stable with the gate-last approach, and an additional strain is achieved on the silicon channel in the PMOS transistor when the polysilicon replacement is removed. However, the gate-first camp, which includes GlobalFoundries, IBM, and the other members of the Fishkill Alliance, argue that the gate-first approach delivers a smaller die size than the gate last approach. Several companies which rely on foundries are now conducting shuttle runs to compare the performance and area of the competing approaches to high-k deposition.

“For low-power logic at 28nm, the gate-first approach can definitely meet the technology targets,”

EETimes.com – TSMC tries to rally support for 450-mm wafers

EE Times: Semi News

TSMC tries to rally support for 450-mm wafers

Peter Clarke

EE Times

(05/10/2010 9:40 $ EDT)

LONDON — A transition to manufacturing on table-top sized 450-mm diameter wafers is an important enabler for cost reduction, according to Jack Sun, chief technology officer of Taiwan Semiconductor Manufacturing Co. Ltd., speaking at the International Electronics Forum, held in Dresden, Germany last week.

Unfortunately, despite saying that he expected 450-mm production to begin by the middle of the decade, Sun could shed no light on how the industry was going to fund what some observers have said could be a $20 billion bill.

“I do believe it is going to happen. No single company can afford it. It is an ecosystem issue; equipment makers, device makers, customers, governments all have to pitch in,” Sun said. “Before the [economic] crisis we thought it would happen in 2012,” said Sun. “Now that’s been pushed a couple of years out. We have to pick up the pace.” Unfortunately very few other chip makers — and almost none of the chipmaking equipment vendors — feel much inclined to help. The only companies expressing any interest in 450-mm wafer processing besides TSMC are Intel and Samsung.

Luc van den Hove, president and CEO of IMEC, said that expansion of the clean rooms at the European research institute could be used to aid progress towards 450-mm wafer production. “The expansion could be used for some early experiments but we are not going to set up a full 450-mm production line. I don’t see that happening in the next couple of years.”

Van den Hove stressed that the main reason for expansion was to accept a second preproduction extreme ultraviolet lithography tool. IMEC’s primary interest was in semiconductor process and device research and much of that could be done on 300-mm diameter wafers regardless of the size of wafer used in commercial production.

via EETimes.com – TSMC tries to rally support for 450-mm wafers.

EETimes.com – IMEC forms ‘more-than-CMOS’ alliance with TSMC

EETimes.com – IMEC forms ‘more-than-CMOS’ alliance with TSMC.


EE Times

LONDON — Luc van den Hove, president and chief executive officer of IMEC (Leuven, Belgium), has said the research institute has entered into a partnership with Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan) to develop hybrid “more-than-Moore” process technologies and pass them on to the Taiwanese foundry.Although IMEC works with most leading chip makers on the leading-edge of CMOS materials and process development, there is tremendous scope for creating application-driven variants of CMOS at more mature nodes.

Speaking at the International Electronics Forum in Dresden, Germany, van den Hove said IMEC would develop CMORE platforms for specific applications. Hybrid processes could mix logic and memory with thermal, chemical and optical sensors, with bioelectronic interfaces, with photonics, microelectromechanical systems (MEMS) and RF circuits in BiCMOS processes.

While IMEC has created and is expanding a 300-mm pilot wafer fab for leading-edge research, it has an older 200-mm pilot line that is suitable for developing so-called CMORE processes.

“We will develop CMORE platforms for specific applications and have a partnership with for TSMC to take on the processes from there,” van den Hove told attendees at the conference.

Van den Hove said that for a major foundry like TSMC there was a chicken-or-egg problem in that it could not develop specialized processes until it was sure of volume demand and volume demand would not materialize without the existence of the process. IMEC was in a position to break that impasse and to work with customers in low volumes before passing the process over to TSMC as and when higher volumes of chips are needed.

Finding the sweet spot where an application-specific process appeals to a large number of customers, or at least a few customers who foresee high volumes, will be the key. Such areas could include medical electronics, consumer interfaces or instrumentation.

IMEC has appointed Kees den Otter, former president of TSMC Europe BV, to the position of vice president of emerging business, an apparent indication that IMEC intends to drive its CMORE program on a commercial basis.

Group Opposing 450 mm N.Y. Subsidy – 2010-02-08 14:55:52 | Semiconductor International

Group Opposing 450 mm N.Y. Subsidy – 2010-02-08 14:55:52 | Semiconductor International.

A “Concerned Citizen Group” is opposing any New York State funding for a 450 mm wafer development center at CNSE/Sematech in Albany, N.Y. The group told New York politicians that any state funding for 450 mm development would not benefit companies operating in the state, and would be a “reckless waste of taxpayer money.”

David Lammers, News Editor — Semiconductor International, 2/8/2010

An anonymous “Concerned Citizen Group” is claiming that a move is afoot to gain New York State tax dollars to support a 450 mm wafer development effort based in Albany, N.Y. The group has appealed to several New York politicians, arguing that the claimed effort by Sematech and the College of Nanoscale Science and Engineering (CNSE) “is a reckless waste of taxpayer money and should not be pursued.”

The group said a grant request is being prepared for consideration by the New York Legislature that would appropriate tens of millions of dollars for support of a 450 mm development effort. The group said the money would be spent on equipment largely manufactured outside of New York, noting that it will have little benefit on employment in the state.

The group also said that the three companies that are publicly supporting the transition to 450 mm wafers — Intel Corp. (Santa Clara, Calif.), Samsung Electronics Co. Ltd. (Seoul, South Korea) and Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC, Hsinchu, Taiwan) — do not have plans for manufacturing in New York. “None are New York companies and two of the three are from Asia. None have manufacturing facilities in New York nor is there planning to have job facilities in New York.”

The group said any New York State grant to CNSE/Sematech Albany “is of no economic benefit to New York. It is a reckless waste of taxpayer money and should not be pursued.”

Thus far, Sematech’s 450 mm development program has been run by its ISMI subsidiary from a relatively small space in Austin, Texas. The 450 mm program is transitioning to a new phase this year, moving from wafer handling infrastructure to early wafer processing.

450 development timeline (020810-450DevTimeline.jpg)The ISMI 450 mm wafer development effort is moving to a wafer processing stage, starting this year. (Source: ISMI)

Sematech spokeswoman Anne Englander said she was not aware of any discussions by Sematech and CNSE to co-develop a 450 mm development facility. “There is no new news on the 450 mm front,” she said. Steve Janack, a spokesman at Albany NanoTech, said he was “not aware of any discussions with Sematech, or Samsung, Intel or TSMC” regarding 450 mm development.

cnse expansion (020810-Aerial-CNSE.jpg)CNSE has expanded its cleanroom and office space in the past year. (Source: CNSE)

FCRP funding status 2009

Issue_FCRP.pdf (application/pdf 객체).

Technology diversification and implication on design @ IMEC 2007 TAD conference

Questions_panel_workshop_Nov12.pdf (application/pdf 객체).