Archive for the ‘ AMD ’ Category

ATIC takes control of GlobalFoundries

ATIC takes control of GlobalFoundries.

As part of a new and complex transaction, Advanced Micro Devices Inc. (AMD) has reduced its stake in GlobalFoundries Inc. from about 30 percent to 14 percent. SAN JOSE, Calif. – As part of a new and complex transaction, Advanced Micro Devices Inc. (AMD) has reduced its stake in GlobalFoundries Inc. from about 30 percent to 14 percent.

In the deal, Abu Dhabi’s Advanced Technology Investment Co. (ATIC) now owns 86 percent of GlobalFoundries, a U.S.-based silicon foundry vendor. Previously, ATIC owned 70 percent. The ATIC is a specialist investment company created by the Government of Abu Dhabi to focus on investments in the advanced technology sector. ATIC’s sole shareholder is the Government of the Emirate of Abu Dhabi.

In 2009, the chip-manufacturing arm from AMD was spun off into a new foundry company. The foundry spinoff, GlobalFoundries, had been a joint venture between AMD and Abu Dhabi’s ATIC. At the time, AMD moved to become a fabless chip maker.

ATIC had planned to boost its stake in GlobalFoundries from about 68 percent to 70 percent. Over time, ATIC is supposed to take the entire stake in GlobalFoundries from AMD. In September, ATIC agreed to acquire Singapore-based Chartered Semiconductor Manufacturing Co. Ltd. for a total of $3.9 billion. Chartered has been folded into GlobalFoundries.

Then, on Dec. 27, 2010, ATIC said that it contributed all of the outstanding ordinary shares of GlobalFoundries Singapore Pte. Ltd., a private limited company organized in Singapore (formerly Chartered Semiconductor Manufacturing Ltd.) to Globalfoundries Inc., in exchange for 2,808,981 newly issued shares of GF Class A Preferred Shares.

As of the closing of the contribution, AMD’s ownership of GlobalFoundries is now approximately 14 percent. AMD’s processors are made on a foundry basis by  GlobalFoundries. Some of AMD’s chips are made by TSMC and others. By reducing its stake in GlobalFoundries, AMD is free to expand its ties with TSMC and others.

Despite a sudden and disturbing lull in the IC market, GlobalFoundries is moving full speed ahead with its aggressive silicon foundry strategy. As part of those efforts, the company recently disclosed plans to devise a 20-nm process and rolled out a new, high-end 28-nm offering. It also announced an intellectual property (IP) deal with ARM Holdings plc and said it is developing technology to enable 3-D chips based on through-silicon-vias (TSVs).

ATMC plans to spend up to $7 billion to build a semiconductor fab in Abu Dhabi, the capital of the United Arab Emirates,


AMD, Nvidia Lose Share As Intel Leads The Graphics Market | Sramana Mitra on Strategy

AMD, Nvidia Lose Share As Intel Leads The Graphics Market | Sramana Mitra on Strategy.

According to a recent Jon Peddie Research report, Intel (NASDAQ:INTC) increased its graphics chip market share to 55.2% driven by strong Atom sales while Nvidia’s (NASDAQ:NVDA) share declined to 24.3% and AMD’s (NYSE:AMD) share declined slightly to 19.9%. Let’s take a closer look.

The quarterly research report included the first shipments of a new category, the CPU-integrated graphics – CIG and predicts that there would be a rapid decline in shipments of traditional integrated graphics processors (IGPs). AMD gained share in the notebook IGP segment, but lost share in both the desktop and notebook GPU segments due to constraints in 40nm supply. NVIDIA gained some share in desktop discretes, while slipping in desktop and notebook IGP. This downward trend will likely continue as Nvidia’s focus shifts to tablets and cell phones with its new Tegra chip.

In the higher-end advanced graphics card market where Nvidia dominates, Intel had earlier planned to compete with an advanced graphic card, Larrabee. However, Intel recently scrapped its plans for a commercial launch and said that it would instead use it as a software development platform for graphic and high-performance computing.

Nvidia last week reported fiscal year 2010 revenue of $3.3 billion, down about 3% and net loss of $68 million. As the market rebounded, fourth quarter revenue grew 9% q-o-q and doubled from last year and it swung to a profit of $131.1 million from a loss of $147.7 million last year. It ended the quarter with $1.73 billion in cash.

Gross margin in the quarter improved to 44.7% with strong demand but it was unable to meet the demand due to supply constraints and probably missed out on revenue of $100 million. Last quarter coverage is available here and recent coverage of Intel is available here.

Nvidia’s GPU revenue was up 22% q-o-q and within that, revenue from desktop GPU was up 19% and notebook GPU up 27% while Quadro graphics revenue was up 25%.

For the first quarter, Nvidia expects revenue to be flat from the fourth quarter as it expects to face constraints for at least half the year. Gross margin is expected to be 44 to 45%.

Nvidia has a lot of new products in the pipeline apart from the new Tegra chip. It also introduced Optimus switchable graphics technology, which provides the performance of discrete graphics while still delivering great battery life. Asus announced its laptop using this new technology. Acer last week announced its netbook based on ION. Nvidia expects these two technologies to supplement its Media Communications Processor (MCP) business that it is transitioning out of.

AMD on the other hand reported a 40% q-o-q increase in its fourth quarter graphics revenue of $427 million. Total revenue in the fourth quarter was up 42% to $1.646 billion and net income was $1.18 billion including $1.25 billion settlement paid by Intel.  For the full year, revenue declined 7% to $5.4 billion and it swung to a profit of $304 million from a loss of $3.1 billion.

Gross margin in the quarter improved to 45% and it ended the quarter with $1.8 billion in cash. AMD which also competes with Intel in the computing chips business reported Computing Solutions revenue of $1.214 billion, up 14% q-o-q with notebook processor sales up 19% q-o-q.

AMD expects revenue to be down seasonally for the first quarter. It is currently trading around $8 with market cap of $5.5 billion and 52-week high at $9.95 on December 24. Nvidia is trading around $16 with 52-week high at $18.78 on December 30 and market cap of $9 billion. – Closer look inside AMD’s Llano APU at ISSCC – Closer look inside AMD’s Llano APU at ISSCC.

OTTAWA — Monday afternoon at ISSCC in San Francisco, AMD disclosed technical details of its accelerated processing unit (APU) known as Llano for the first time. AMD provided me with a telephone briefing of their Llano disclosure at ISSCC (Paper 5.6 An x86-64 Core Implemented in 32nm SOI CMOS). My briefing was delivered by AMD Senior Fellow Sam Naffziger who leads processor design.

Naffziger co-authored the AMD paper that highlights the X86 side of the design although there is speculation that much of the challenge of the APU lies in the monolithic fusion of CPU and GPU on silicon.

The AMD PR team told me that the decision to present the X86 design first is not a reflection of the relative difficulty of one over the other. However, they did admit that ntegrating the APU on the same silicon as the CPU required some interesting design elements that they will keep close to the vest for now.

Obviously, I can’t comment on that, but I have to agree with the marketing folks that so much has been said about GPU integration in the last few years that there was a clear need to keep the X86 core design from getting swamped in the news.

AMD believes it takes more than just scaling up the number of cores to improve performance. In fact, they think that approach will soon reach a limit. In AMD’s assessment, we are in the mature stage of multi-core design, but poised to begin the new era of “heterogeneous systems” offering “abundant data parallelism” and “power efficient GPUs.”

To summarize the Llano APU, it will contain four X86 cores each with over 35 million transistors occupying just shy of 10mm2. All four cores get their own megabyte of L2 cache SRAM (which adds to the quoted total transistor count and silicon associated with each). AMD targets operation above 3GHz and supply voltages of 0.8 to 1.3 V.

Although AMD’s ISSCC presentation today is not about the new Bulldozer or Bobcat architecture planned for next year, the Llano design offers some cool features.

AMD uses a legacy architecture for the device to lessen the risk of the transition to the 32nm process node. But ISSCC is about circuits, and that’s what AMD will present. Naffziger and the rest of the design team have wrapped a number of power reduction elements around their existing X86 core design.

Drawing on a solid history of energy efficient CPUs, AMD’s processor group presents three power management innovations in its talk this afternoon.

1. Core power gating

Gives Llano an envelope of 2.5 to 25W depending on the performance demand. Each core can be independently and completely disconnected from the power supply.

2. Digital on-die temperature measurements

On die temperature measurements are not new, but AMD’s digital approach claims to improve accuracy and repeatability of the die temperature map.

3. Power aware clock grid design

Taking a close look at the clock grid saved a lot of potentially wasted watts. This thorough approach to not just achieving clock specs across the die but also trying to improve the clock efficiency actually reduced the metal capacitance in the grid by more than 80% and reduced the number of final clock buffers by better than half.

The before and after pictures of the clock metal grid in the AMD presentation are quite striking. And they should be. There are big power-performance benefits of the new clock design if you consider that up to 30% of total processor power consumption can be consumed by the clock tree.

While many will argue how competitive AMD currently is, it’s probably no surprise that just participating in the microprocessor business demands staying on the leading edge. But I thought it was still interesting that AMD was able to include three hot topics in their X86 paper even though their core architecture is not new.

Looking at the other sessions at ISSCC, the AMD presentation discusses three major technical fields considering that the conference offered tutorial sessions for each of these areas. (See T5: Design of Energy-Efficient On-Chip Networks , T6: Design of Smart Sensors, and T8: Power Gating.) In fact, the instructor for the power gating tutorial was actually given by Stephen Kosonocky from AMD.

Their design innovations are significant considering that Llano is not actually a new architecture for AMD like the upcoming Bulldozer or Bobcat. Instead, AMD uses a legacy X86 core to minimize the risk of moving to a new process technology ‘ la Intel’s tick-tock approach.

If you think advanced CPUs are just tiny bits (Llano rolls out on 32nm – more on that below), think again. The power gating transistors used to cut power to individual cores are a full meter wide.

Yes, I do mean a full 39 inches or more than three full feet. That’s the kind of W/L ratio that’s sure to get some poor reverse engineer chastised by a supervisor (at least for RE companies that include that type of information). “What’s this number with the seven zeroes? Did you fall asleep at your workstation again?”

The more serious aspect to the large power gating devices is that AMD switches the ground side of the supply. Knowing that N-channel transistors offer 20 to 30 percent higher drive currents per unit width than their P-channel CMOS counterparts, controlling the ground side of the supply means that NFET switches require up to 30% less width and therefore space on the die. AMD is quick to point out that competitors designing on bulk CMOS technology need to gate the positive side of the power supply and use larger PFETs.

By the way, AMD will not require an extra thick top metal for power distribution on this chip that is commonly used on other technology platforms. That’s another advantage of gating the ground side. It allows the design to switch the core connections to the big ground conductors present in the package rather than thick on die copper for VDD.

To add a measure of objectivity, the ground gating advantages of SOI are becoming less important. As Intel pointed out in a recent technology analyst call, their PFETs are catching up fast. Embedded SiGe source / drains add an extra knob for process engineers trying to improve current drive by adding compressive strain to the P-channel. At 32nm, Intel was closer to the 20% end of the scale and PFET performance will continue to catch up to NFETs at 22nm.

While AMD’s transition to 32nm high-K metal gate (HKMG) processing is a major factor keeping power consumption in check, that’s not the highlight of today’s presentation. Although Llano will be the first chip in the consumer market to use the HKMG stack on SOI substrate (actually the first 32nm SOI as well), AMD lags their competition at Intel in both the process node and the material innovation since Intel launched 32nm in the fourth quarter of 2009 and brought high-K and metal gates into the mainstream on their 45nm node that hit the street two years earlier.

AMD has done a good job of tempering what I’m sure is a lot of internal excitement (loosely interpreted to include Global Foundries as well) over the launch of their own 32nm process considering the lead Intel maintains in this area. They know that too much emphasis here would put the follower’s spotlight on them since most people would not understand the additional effort necessary to roll out HKMG on the SOI platform compared to bulk silicon.

Some who understand the added complexity of SOI would probably still debate the business decision to pursue it over bulk technology. But AMD maintains its strong belief in the advantages of SOI, and they will highlight that again in the Naffziger talk this afternoon.

So when will Llano hit the market? AMD’s PR team promises that the chips will sample to its customers by June this year. Expect it in consumer goods some time in 2011. – ISSCC: Intel has edge over AMD, for now – ISSCC: Intel has edge over AMD, for now.

SAN FRANCISCO, Calif. — Intel Corp. has a significant, if temporary, edge over archrival Advanced Micro Devices based on news and papers emerging here Monday (Feb. 8) at the International Solid State Circuits Conference (ISSCC).

Intel described at ISSCC its first 32nm server processor to use six cores. Meanwhile AMD discussed a new core it will use in its first processor to combine x86 and graphics cores called Llano.

Separately, Intel announced Monday its long-delayed Itanium 9300. It is Intel’s first Itanium chip to use the company’s QuickPath Interconnect letting OEMs link eight multicore processors with additional logic. To date, AMD has been limited to linking four chips in a symmetric multiprocessing system without the need for extra chips.

Intel’s Westmere EP is a 32nm server CPU using six dual-threaded cores linked to DDR3 memory. It leapfrogs AMD’s existing 45nm Istanbul server chip, launched in June that uses six single-threaded cores and links to DDR2 memory.

Intel said it will roll out in 90 days an eight-core server chip, Nehalem EX, made in a 45nm process. AMD is expected to respond later this year with a 12-core CPU called Magny Cours. It will put two six-core die in a package that links to DDR3 memory.

Intel’s six”core Westmere packs 1.17 billion transistors, uses a 12 MByte shared L3 cache and supports low-voltage DDR3 memory. Intel’s ISSCC paper describes a new anti-resonance feature in Intel’s QuickPath Interconnect that lowers jitter on the chip.

Meanwhile, AMD is providing only a few details about Llano, a version of its 45nm x86 core upgraded for use in the company’s first processor to merge x86 and graphics cores. Llano will use four x86 and one graphics core, link to DDR3 memory, sample this year and ship in PCs in 2011.

Intel showed a working version of its first Westmere processor at last year’s ISSCC. That chip combines separate 45nm graphics and 32nm x86 cores in a single chip package and is shipping in systems now. Intel has said it will put graphics and x86 cores on a single die with a 2011 chip that uses its next-generation microarchitecture called SandyBridge.

AMD revealed the x86 core in Llano measures 9.69mm2 and uses 35 million transistors, excluding a Mbyte L2 cache block. It will run at up to 3 GHz and operates across a 0.8 to 1.2 V range while dissipating up to 25W. It is made in a 32nm silicon-on-insulator process.

In its paper, AMD detailed power saving techniques used in the core. They include use of a novel NFET power grating transistor and a clock grid optimized to reduce clock buffers and clock switching power. AMD did not talk about the graphics core used in Llano or any other details of the processor beyond its core.

The Llano x86 core is an anomaly of sorts. Most of AMD’s future CPUs will employ one of two new x86 cores, called Bobcat and Bulldozer. The company so far has not revealed many details about those cores expected to emerge in products starting in 2011.

The new AMD cores will compete with the SandyBridge 32nm microarchitecture Intel will likely reveal late this year. The new cores will set up the next round of leapfrog between the two archrival’s products.

Separately at ISSCC, Intel also described new low power circuits used in its Westmere device that includes two x86 cores and one graphics core. The chip uses low voltage DDR3 links running at up to 1.3 GigaTransfers/second with new fast wake up circuits. It also applies new power management techniques to the graphics core that runs from 150 to 500 MHz and to analog circuits on the chip.

Intel will also present a handful of papers on research efforts exploring more aggressive multicore architectures.

One paper describes a 45nm device that uses 48 Pentium-class cores on a message-passing network. It marks a step forward from a chip the company discussed at previous ISSCC sessions using 80 cores that were essentially floating-point units, not full x86 cores.

A second paper presented Monday discusses an 8×8 mesh network on a chip that delivers 2.6 Terabits/s in throughput using a circuit switched technique. The approach aims to save power by setting up direct point-to-point links across a chip, eliminating buffers.

AMD Constrained on 40 nm GPUs From TSMC – 2010-01-22 00:28:28 | Semiconductor International

AMD Constrained on 40 nm GPUs From TSMC – 2010-01-22 00:28:28 | Semiconductor International.

AMD executives said the company is “heavily constrained” now on shipments of its 40 nm graphics processors, made at TSMC. “We are seeing progress both in the delivery of wafers and the underlying yields. But we are constrained today,” AMD CEO Dirk Meyer said.

David Lammers, News Editor — Semiconductor International, 1/21/2010

The ability of Advanced Micro Devices Inc. (AMD, Sunnyvale, Calif.) to sell its newest-generation graphics processors has been “heavily constrained” by limitations at its main foundry, said AMD CEO Dirk Meyer.

Dirk Meyer, CEO, AMD (012210-Meyer_Dirk.jpg)
Dirk Meyer, CEO, AMD

“We could have done a lot more business,” Meyer said in a conference call following the company’s release of Q4 financial results. “We are seeing progress both in the delivery of wafers and the underlying yields. But we are constrained today.” Meyer added that he expects the supply constraint to continue.

AMD’s ATI graphics operation has received acclaims for its DX11 line of graphics processors, made largely at Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC, Hsinchu, Taiwan) on its 40 nm process. TSMC has been working to deliver more 40 nm wafers to its customers, and has cited “chamber matching” issues as an impediment to 40 nm yields in recent quarters.

One analyst said that customers are “fighting over” the supply of the DX11 chips, and asked when AMD will no longer be supply-constrained. Much of AMD’s production remains at 55 nm, on the DX10 product family, according to Meyer. “A substantial amount of our shipments were still on 55 nm in the fourth quarter,” he said, adding, “We have a lot of demand for the DX11 products.”

The AMD executives said the company will begin shipping its Fusion line of integrated CPU-GPU products late in 2010. The integrated Fusion products will compete for market share with the discrete graphics processors, Meyer said. AMD is expected to ship Fusion first on a silicon-on-insulator (SOI) technology, and follow that with a bulk Fusion product.

GlobalFoundries relationship

Analysts questioned how the AMD-GlobalFoundries relationship will play out this year. Earlier this week, the Reuters news agency said the Abu Dhabi Advanced Technology Investment Corp. (ATIC) had petitioned German government authorities about a plan for ATIC to acquire the remaining portion of GlobalFoundries now owned by AMD.

Thomas Seifert, CFO, AMD (012210-Seifert_Thomas.jpg)
Thomas Seifert, CFO, AMD

On the conference call, AMD CFO Thomas Seifert — a former Qimonda executive — said reports that AMD would completely divest its share of GlobalFoundries were not accurate. “Some of the filing with the German authorities was misunderstood,” Seifert said.

For this year, AMD will report its manufacturing costs in a fixed-cost mode, but that will shift to a variable-cost model next year, Seifert said. AMD has “completed its 45 nm transition” at the Dresden fabs. “There is room to improve on the fab utilization at Dresden, and there is room to improve on the yield,” he said.

This year AMD will be a “product company only,” Seifert said, adding that it would transition to purchasing wafers from GlobalFoundries.

The conference call left open the question of whether ATIC will seek to completely take ownership of GlobalFoundries.

“The recent filing with the German authorities is simply consistent with the long-announced plan for AMD to gradually become fabless, which was one of the key strategies behind the creation of GlobalFoundries,” said Brian Lott, executive director of communications at ATIC. “As ATIC invests more in GlobalFoundries over time, it will incrementally increase its ownership percentage and as its largest shareholder, will gain sole control over the company.”

Drew Prairie, an AMD spokesman, was asked about the Reuters report. “We are not selling our stake. We have said we expect our stake to decline over time,” he said. “This is simply related to the ATIC acquisition of Chartered and the combination of Chartered/GlobalFoundries into a single operating entity.” – AMD jumps into fabless chip company ranking – AMD jumps into fabless chip company ranking.

LONDON — Only seven fabless chip companies out of the top 25 managed to grow their revenue in 2009, according to market research company IC Insights Inc. (Scottsdale, Ariz.). However, Advanced Micro Devices Inc. (Sunnyvale, Calif.) jumped into the rankings at number two, courtesy of its divestment of its manufacturing to GlobalFoundries.The six growth companies were number one ranked Qualcomm, MediaTek, RealTek, MStar, Atheros, Silicon Labs and RickTek, which jumped into the ranking at position 24 (see table).

Click on image to enlarge.

IC Insights considers a company fabless when it receives the majority of its finished wafer supply from IC foundries and in this ranking is tracking only IC sales and does not include optoelectronic, sensor, or discrete semiconductor revenues.

There were nine fabless IC companies in 2009 that had sales of $1.0 billion or more. IC Insights has included all of AMD’s 2009 sales although the spin-off occurred late in Q1 2009.

Not including AMD, the top 10 fabless companies’ sales, in total, declined 4 percent in 2009 while the remainder of the fabless companies’ IC sales dropped 13 percent, reflecting the difficult economic circumstances experienced by almost all chip companies. However, that lesser decline by the top ten means that their share of the total fabless IC sales rose to 65 percent in 2009, up five points from 2007.

As the barriers to entry rise — design costs, reduced access to venture capital — it is expected that the fabless IC supplier listing will continue to mature and become more concentrated, IC Insights said.

Nine out of top 10 fabless IC companies in 2009 are based in the U.S. and there is only one Japanese company in the top 25 (MegaChips). IC Insights said that it does not expect the fabless chip company business model to make progress in Japan but that it does expect more Taiwanese and Chinese companies to break into the top 25.

Cellular phone chip supplier Qualcomm remained the number one fabless IC supplier, registering $6.6 billion in sales in 2009, a 2 percent increase. MediaTek registered a strong 22 percent increase in sales to $3.5 billion.

In 1999, fabless IC company sales accounted for just over 7 percent of the total IC market. In 2009, fabless IC suppliers (including AMD) represented 23 percent of worldwide IC sales, IC Insights said. By 2014, IC Insights forecasts that fabless IC companies will command at least 27 percent of the total IC market.

AMD의 파운드리 분사, 새로운 ‘기회의 창’ 연다

AMD의 파운드리 분사, 새로운 ‘기회의 창’ 연다.

Bolaji Ojo

Doug Grose

AMD(Advanced Micro Devices)사가 자본 집약적인 자사의 반도체 제조 사업을 분사 시킨다는 대담한 계획의 성공 여부는 이 회사의 제조 및 공급망 관리 부문 수석 VP인 Doug Grose 씨에게 달려 있다. Grose 씨는 IC 산업 분야에 20년간 몸담아온 베테랑으로서 IBM사의 시스템 및 기술 그룹 중역을 맡았던 경력이 있다.

분사계획이 발표된 이래로 Grose 씨는 업계의 반응을 지켜봐 왔는데, 그 가운데 일부는 AMD사의 전망에 대해 낙관적이었다.

그러나 AMD사가 Abu Dhabi 정부와 맺은 조인트벤처 계약에 대한 업계의 반응은 상당 부분 회의적이었다. 일부 업계 관측통들은 새로운 Foundry Co.사에 대해 지지하기를 꺼렸으며, 또 다른 이들은 이 새로운 업체가 TSMC(Taiwan Semiconductor Manufacturing Co.)사가 장악하고 있는 시장에서 경쟁할 수 있을 지 의구심을 표명했다.

Grose 씨가 CEO를 맡게 될 것으로 보이는 이 새로운 Foundry Co.사가 AMD사와 라이벌 업체인 Intel사 간에 발생할 수 있는 까다로운 지적재산권 협정 및 상호 라이선싱 문제를 어떻게 처리할 것인지에 대해서도 우려의 목소리가 나왔다. 사실 일부 관측통들은 두 업체가 자신들의 IP 라이선싱 관계와 관련된 문제들을 해결하지 못한다면 Intel이 AMD사의 계획을 좌절 시킬 수도 있다고 단언하고 있다.

Grose 씨는 이러한 문제들 가운데 일부에 대해 새로운 파운드리는 IP 라이선싱 문제를 해결할 계획을 갖고 있다고 설명했다.

그 는 AMD사와 Abu Dhabi의 ATIC(Advanced Technology Investment Co.)사 간에 이루어진 이 새로운 조인트벤처가 이미 IBM의 공정기술 동맹 회원사들을 공략함으로써 고객 명부를 채워가려 하고 있다고 말했다. AMD사의 경영진들도 자신들이 도전에 직면해 있음을 잘 알고 있지만, 웨이퍼 아웃소싱 시장이 제공하는 기회가 문제를 훨씬 상회한다고 Grose 씨는 말했다.

AMD사의 과거 제조 모델에 무슨 문제가 있었나?

반도체 공정 능력의 최첨단 지위를 유지하는 것은 물론 AMD사의 시각에서 볼 때 대량의 마이크로프로세서를 내놓는 데 필요한 생산 능력을 갖기 위해 필요한 자본의 규모가 AMD사의 재무상황에 커다란 압박을 가했다.

지난 10~15년 동안에 반도체 업계에서 일어난 일들을 생각해 본다면 이 파운드리 업체는 자연스러운 진화라고 할 수 있다.

IDM사들은 우리처럼 독자적 기술개발을 지양하고 파트너쉽을 맺고 있으며, 독자적인 팹 건설도 하지 않는 추세이다.

따라서 파운드리 시장은 AMD사처럼 설계와 아키텍처에 투자를 집중하고 자신들의 투자를 그야말로 다른 방식으로 이용하고자 하는 업체들에게 있어서는 여전히 매력적인 시장이다.

초기에는 AMD사가 Foundry Co.사의 유일한 고객이 될 것이다. 다른 고객사들을 끌어들일 가능성은 어느 정도인가?

Foundry Co.사의 일차적 역할은 무엇보다도 AMD사와 그 제품들을 위한 서비스를 제공하는 것이다. 그러나 그와 동시에 써드파티 고객사들을 끌어들일 수 있는 능력을 개발하는 것도 우리의 역할이 될 것이다.

우리는 이들을 지원하기 위해 최첨단의 능력과 생산 능력 그리고 설계지원 환경을 구축하려 한다. 향후 1~2년 동안에 우리는 써드파티 고객사들에 집중하면서 이러한 요소들을 구축하는 데 전력 투구할 것이다.

기술 및 마케팅 면에서는 무엇에 집중할 계획인가?

우 리는 IBM 에코시스템에 대한 관계를 확장해 왔다. 따라서 우리가 일차적으로 집중할 것은 32nm와 이 디자인을 추구하는 탑 10 고객사들에게 손을 뻗는 것이다. 우리에게는 완벽한 기회가 주어져 있다. 이제 최첨단 기업들은 어떻게 하면 신제품들을 32nm로 구현할 수 있을 지 생각하기 시작했기 때문이다.

타이밍 면에서 기회는 바로 목전에 다가와 있다. 우리는 IBM은 물론 다수가 최고의 팹리스 설계 업체들인 그 동맹 회원사들과 협력함으로써 이들을 고객으로 끌어들이고자 한다.

내부적으로는 AMD사를 위한 설계 구현 노력을 확장해야만 한다.

파운드리 업체를 위해서는 판매 및 마케팅 능력을 구축해야만 한다. 그것이 바로 도전이자 기회인 것이다. 분사 소식이 알려진 후로 잠재 고객들로부터 흥분과 관심 어린 반응들이 쇄도하고 있다.

그 같은 계획에 대해 귀사에는 필요한 자본을 댈 만한 자원이 없을 지도 모른다는 비판이 있다.

공 식적으로 출범하게 되면 AMD사와 Abu Dhabi의 ATIC사가 우리의 모회사가 될 것이다. AMD사는 Foundry Co.사가 향후 필요로 하게 될 생산 능력에 투자할 수도 있고 투자하지 않을 수도 있는 옵션을 갖게 된다. 우리의 또 다른 모회사는 사업 계획이 진전되고 우리가 경제적 성공을 거둠에 따라 필요한 자본을 적극 제공해주기로 했다. 우리는 초기 사업계획에 필요한 것을 갖추고 있는 것이다.

IP 요건들은 어떻게 다룰 생각인가?

그 가운데 상당부분은 외부의 써드파티 업체들로부터 구할 수 있다. 우리는 이미 필요하다고 생각되는 것을 구비해 놓았다.

그러나 무엇보다도 우리는 하루 속히 잠재 고객들과의 토의를 시작하여 그들이 요구하는 바를 명확히 알고자 하고 있다.

투 자 측면에서 볼 때, 우리는 그러한 IP 능력을 손에 넣어 고객들에게 서비스를 제공할 준비를 갖췄다. 많은 고객들, 특히 대기업 고객들은 IP 지원을 반드시 필요로 하지는 않는다. 그들은 자체적으로 IP를 지원하는 경우가 많기 때문이다.

Foundry Co.사가 앞으로 직면하게 될 도전과 기회는 무엇이라 보며, 이를 어떻게 헤쳐나갈 계획인가?

우리에게 주어지는 기회가 앞으로 직면하게 될 문제들보다 훨씬 클 것이다.

기회란 바로 확장일로의 시장에 서비스를 제공하는 것으로서, 지난 15년간 업계에서 일어난 일들을 고려할 때 이 시장은 계속해서 성장할 것이라 생각한다.

업체들은 파운드리에 대한 선택권을 원하고 있다. 특히 최첨단 생산 능력에 대한 선택권을 가짐으로써 자신들의 생산 요구를 충족시킬 수 있기를 바라고 있다.

이 러한 도전들은 한데 얽혀 있다. 우리의 팹 설비를 독일 Dresden에 세우고, 새로운 최첨단 반도체 공장을 뉴욕에 건설하여 이를 가능한 한 신속하게 가동하는 일들이 다 여기에 포함된다. 우리는 IP 및 설계 지원이라는 관점에서 고객사들에게 서비스를 제공해야 한다는 해결과제도 갖고 있다.

이는 해결 과제인 동시에 우리 앞에 놓인 커다란 기회이기도 하다.